1. Field of the Invention
The invention relates to a two-phase charge pump circuit and, in particular, to the one in which the body of each NMOS or PMOS is independently connected to a switch in order to switch to a relative low or high voltage level at an appropriate time, preventing the body effect from occurring.
2. Description of Related Art
To reduce energy consumption, the power specification of integrated circuits (IC) is re-designed to work under a lower voltage level. For example, the IC power specification was 5 volts before. It is now reduced to 3.3 volts or even lower than 2 volts. Although using a lower voltage to supply power can reduce the energy consumption, there are still situations where larger voltages are needed. Take the flash memory as an example. It requires a larger negative voltage for erasing. The lager voltage is supplied by a charge pump circuit. Aside from outputting a negative voltage, there are also charge pump circuits that can output high-level positive voltages.
With reference to FIG. 9, U.S. Pat. No. 6,384,669 discloses a charge pump circuit consisted of NMOS transistors. The driving signal of each NMOS transistor in the circuit is given in FIG. 10. The structure of the charge pump circuit is symmetric between upper and lower portions. In this circuit, the body of each NMOS transistor is connected to the ground without any other further processing. Therefore, each NMOS transistor has an obvious body effect. Due to the existence of the body effect, a voltage to make each NMOS transistor conductive has to be even higher. Therefore, one has to take into account the voltage tolerance of the transistors.